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 NJW1110
9-Input 3-Output Stereo Audio Selector
! GENERAL DESCRIPTION NJW1110 is a 9-input 3-output stereo audio selector. It includes three independent 9input-1output stereo audio selectors and adjustable gain buffers. NJW1110 performs superior audio characteristics such as low distortion, low output noise and low crosstalk. All of internal status and variables are 2 controlled by I C BUS interface. And the slave address selector is available for using two chips on same serial Bus line. It is suitable for latest TV system and others. ! APPLICATIONS *FPD TV *Car Audio System *Monitor ! FEATURES * Operating Voltage 7.5 to 15V * Operating Current 8mA typ. * 9-Input, 3-Output Stereo Audio Selector * Low Distortion 0.0007% typ. * Low Output Noise 116dBV typ. * Low Crosstalk 110dB typ. * Channel Separation 110dB typ. * Variable Gain Buffer 0, 3 to 8dB/0.5dB step 2 * I C Bus Interface (Comply with fast mode and 3V I/F) * Selectable 2-Slave Address * Bi-CMOS Technology * Package Outline SSOP32 ! BLOCK DIAGRAM
InB1 InB2 InB3 InB4 InB5 InB6 InB7 InB8 InB9 OutB1 OutB2 OutB3 ADR V+
! PACKAGE OUTLINE
NJW1110V
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
10F
+
+
100F
32
31
30
29
28
27
26
25
24
23
22
21
20
19
GND
18
17
MUTE
Gain
50KX18 8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep Vref
Gain
8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep
MUTE
I2C Control Logic
GND GND
1
10F
+
2
10F
+
3
10F
+
4
10F
+
5
10F
+
6
10F
+
7
10F
+
8
10F
+
9
10F
+
10
10F
11
+
12
10F
+
13
10F
+
14
15
16
InA1
InA2
InA3
InA4
InA5
InA6
InA7
InA8
InA9
OutA1
OutA2
OutA3
SDA
SCL
-1-
NJW1110
! PIN CONFIGURATION
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
InA1 InA2 InA3 InA4 InA5 InA6 InA7 InA8 InA9 GND OutA1 OutA2 OutA3 GND SDA SCL
InB1 32 InB2 31 InB3 30 InB4 29 InB5 28 InB6 27 InB7 26 InB8 25 InB9 24 Vref OutB1 OutB2 OutB3 23 22 21 20
GND 19 ADR V+ 18 16 17
No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Symbol
InA1 InA2 InA3 InA4 InA5 InA6 InA7 InA8 InA9 GND OutA1 OutA2 OutA3 GND SDA SCL
Function
Ach Input 1 Ach Input 2 Ach Input 3 Ach Input 4 Ach Input 5 Ach Input 6 Ach Input 7 Ach Input 8 Ach Input 9 GND Terminal Ach Output 1 Ach Output 2 Ach Output 3 GND Terminal SDA Data Input (I2C BUS) SCL Clock Input (I C BUS)
2
No.
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Symbol
V+ ADR GND OutB3 OutB2 OutB1 Vref InB9 InB8 InB7 InB6 InB5 InB4 InB3 InB2 InB1
Function
Power Supply Terminal Slave address setting terminal GND Terminal Bch Output 3 Bch Output 2 Bch Output 1 Reference Voltage Bch Input 9 Bch Input 8 Bch Input 7 Bch Input 6 Bch Input 5 Bch Input 4 Bch Input 3 Bch Input 2 Bch Input 1
-2-
NJW1110
! ABSOLUTE MAXIMUM RATING (Ta=25C) PARAMETER SYMBOL
Power Supply Voltage V
+
RATING
16 0 to V+ 800
()
UNIT
V V mW C C
Maximum input voltage
Power Dissipation Operating Temperature Range Storage Temperature Range
()
VIM PD Topr Tstg
NOTE: EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting
-40 to +85 -40 to +125
For the maximum input voltage less than V+.
! RECOMMENDED OPERATING CONDITIONS (Ta=25C)
PARAMETER Operating Voltage SYMBOL V
+
TEST CONDITION -
MIN. 7.5
TYP. 9.0
MAX. 15.0
UNIT V
! ELECTRICAL CHARACTERISTICS + Power Supply (Ta=25C, V =9V)
PARAMETER Supply Current Reference Voltage SYMBOL ICC VREF
+
TEST CONDITION No Signal No Signal
MIN. 4.0 4.0
TYP. 8.0 4.5
MAX. 12.0 5.0
UNIT MA V
AC CHARACTERISTICS (Ta=25C, V =9V, VIN=0dBV (0dBV=1Vrms), f=1kHz, RL=47k)
PARAMETER Maximum Output Voltage Voltage Gain 1 Voltage Gain 2 Total Harmonic Distortion 1 Total Harmonic Distortion 2 Total Harmonic Distortion 3 Output Noise Cross Talk 1 Cross Talk 2 Channel Separation 1 Channel Separation 2 SYMBOL VOM GV1 GV2 THD1 THD2 THD3 VNO CT1 CT2 CS1 CS2 TEST CONDITION THD=1% VIN=200mVrms, Gain=6dB BW=400Hz-30kHz f=10kHz, BW=400Hz-30kHz V =12V, BW=400Hz-30kHz Rg=0, A-Weighted Rg=0, A-Weighted Rg=0, f=20kHz Rg=0, A-Weighted Rg=0, f=20kHz
+
+
MIN. 6.0
(2.0)
TYP. 8.0
(2.5)
MAX. 1.0 7.0 0.02 -106
(5.0)
UNIT dBV
(Vrms)
-1.0 5.0 -
0 6.0 0.001 0.003 0.0007 -116
(1.6)
dB
%
dBV
(Vrms)
-110 -90 -110 -90
-
dB
dB
BW: Band Width
Logic Control Characteristics (Ta=25C, V =9V)
PARAMETER High Level Input Voltage Low Level Input Voltage SYMBOL VADRH VADRL TEST CONDITION ADR Terminal ADR Terminal MIN. 2.5 0 TYP. MAX. V
+
UNIT
V 1.5
-3-
NJW1110
!TIMING ON THE I C BUS (SDA,SCL)
2
SDA
tf
tr
tSU:DAT
tf
tHD:STA
tSP
tr
tBUF
SCL
tHD:STA
tSU:STA
tSU:STO
S
tLOW
tHD:DAT
tHIGH
Sr
P
S
!CHARACTERISTICS OF I/O STAGES FOR I C BUS (SDA,SCL)
I C BUS Load Conditions STANDARD MODE : FAST MODE :
2
2
Pull up resistance 4k (Connected to +5V), Load capacitance 200pF (Connected to GND) Pull up resistance 4k (Connected to +5V), Load capacitance 50pF (Connected to GND)
PARAMETER
Low Level Input Voltage High Level Input Voltage Low level output voltage (3mA at SDA pin) Input current each I/O pin with an input voltage between 0.1VDD and 0.9VDDmax
SYMBOL
VIL VIH VOL Ii
Standard mode
MIN. 0.0 2.7 0 -10 TYP. MAX. 1.5 5.0 0.4 10 MIN. 0.0 2.7 0 -10
Fast mode
TYP. MAX. 1.5 5.0 0.4 10
UNIT
V V V A
-4-
NJW1110
!CHARACTERISTICS OF BUS LINES (SDA,SCL) FOR I C-BUS DEVICES PARAMETER
SCL clock frequency Hold time (repeated) START condition. Low period of the SCL clock High period of the SCL clock Set-up time for a repeated START condition Data hold time
NOTE)
2
SYMBOL
fSCL tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tr tf tSU:STO tBUF Cb VnL
Standard mode
MIN. 4.0 4.7 4.0 4.7 0 250 4.0 4.7 0.5 1 TYP. MAX. 100 1000 300 400 MIN. 0.6 1.3 0.6 0.6 0 100 0.6 1.3 0.5 1
Fast mode
TYP. MAX. 400 300 300 400 -
UNIT
kHz s s s s s ns ns ns s s pF V
Data set-up time Rise time of both SDA and SCL signals Fall time of both SDA and SCL signals Set-up time for STOP condition Bus free time between a STOP and START condition Capacitive load for each bus line Noise margin at the Low level Noise margin at the High level
VnH
V
Cb ; total capacitance of one bus line in pF.
NOTE). Data hold time : tHD:DAT Please hold the Data Hold Time (tHD:DAT) to 300ns or more to avoid status of unstable at SCL falling edge. The SDA block in the NJW1110 does not hold data. Add external data-delay-circuit of the SDA terminal, in case of not providing a hold time of at least 300nsec for the SDA in the master device. The time-consists of the data-delay-circuit of the SDA terminal are as follows. (a) Low level ! High level : (b) High level ! Low level : TLH RP*CD THL RD*CD
In addition, Schottky barrier diode (SBD) influences a Low level at the Acknowledge. Therefore choose the low forward voltage (Vf) as much as possible.
VDD RP RP SCL
MASTER
SBD
SDA
NJW1110
RD
CD
-5-
NJW1110
! DEFINITION OF I C REGISTER 2 I C BUS FORMAT
MSB
2
LSB
MSB
LSB
MSB
LSB
S
1bit
Slave Address
8bit
A
1bit
Select Address
8bit
A
1bit
Data
8bit
A
1bit
P
1bit
S: Starting Term A: Acknowledge Bit P: Ending Term
SLAVE ADDRESS
MSB
LSB
1 1
0 0
0 0
1 1
0 0
1 1
0 1
R/W R/W
94H(ADR=Low) 96H(ADR=High)
R/W=0: Receive Only R/W=0: Write mode for register setting R/W=1: Not available
CONTROL REGISTER TABLE The select address and sets each function. The auto increment function cycles the select address as follows. 00H01H02H00H BIT Select Address D7 D6 D5 D4 D3
00H 01H 02H Variable Gain Buffer for OUT1 Variable Gain Buffer for OUT2 Variable Gain Buffer for OUT3
D2
D1
D0
Input selector for OUT1 Input selector for OUT2 Input selector for OUT3
CONTROL REGISTER DEFAULT VALUE Control register default value is all "0".
Select Address 00H 01H 02H BIT D7 0 0 0 D6 0 0 0 D5 0 0 0 D4 0 0 0 D3 0 0 0 D2 0 0 0 D1 0 0 0 D0 0 0 0
-6-
NJW1110
! INPUT SELECTOR " INPUT SELECTOR SETTING (OUT1:00H, OUT2:01H, OUT3:02H)
Signal Select Mute InA1/InB1 InA2/InB2 InA3/InB3 InA4/InB4 InA5/InB5 InA6/InB6 InA7/InB7 InA8/InB8 InA9/InB9
D3
0 0 0 0 0 0 0 0 1 1
D2
0 0 0 0 1 1 1 1 0 0
D1
0 0 1 1 0 0 1 1 0 0
D0
0 1 0 1 0 1 0 1 0 1
! VARIABLE GAIN BUFFER " VARIABLE GAIN BUFFER SETTING (OUT1:00H, OUT2:01H, OUT3:02H)
Gain (dB) 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0
D7
0 0 0 0 0 0 0 0 1 1 1 1
D6
0 0 0 0 1 1 1 1 0 0 0 0
D5
0 0 1 1 0 0 1 1 0 0 1 1
D4
0 1 0 1 0 1 0 1 0 1 0 1
-7-
NJW1110
! APPLICATION CIRCUIT
InB1 InB2 InB3 InB4 InB5 InB6 InB7 InB8 InB9 OutB1 OutB2 OutB3 ADR V+
10F
+
10 F
+
10F
+
10F
+
10F
+
10F
+
10 F
+
10F
+
10F
+
10F
+
10 F
+
10 F
+
10F
+
+
100 F
32
31
30
29
28
27
26
25
24
23
22
21
20
19
GND
18
17
MUTE
Gain
50KX18 8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep Vref
Gain
8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep
Gain
8dB to 3dB / 0.5dBstep
MUTE
I2C Control Logic
GND GND
1
10F
+
2
10 F
+
3
10F
+
4
10F
+
5
10F
+
6
10F
+
7
10 F
+
8
10F
+
9
10F
+
10
10 F
11
+
12
10 F
+
13
10F
+
14
15
16
InA1
InA2
InA3
InA4
InA5
InA6
InA7
InA8
InA9
OutA1
OutA2
OutA3
SDA
SCL
-8-
NJW1110
! TYPICAL CHARACTERISTICS
ICC vs Supply Voltage 10
No signal
VREF vs Supply Voltage 10
No signal, T=85,50,25,-20,-40oC
0 to 85oC
ICC [mA]
5
-40oC
-20oC
0 0 5 10 Supply Voltage [V] Maxim um Output Voltage vs Frequency 2.8
V =9V, THD=1%, I/O: INA1-1Aout
+
15
20
VREF[V]
5
0 0 5 10 15 Supply Voltage [V] 20
Maxim um Output Voltage vs Supply Voltage
V+=9V, THD=1%,I/O: INA1-1Aout,T=85,50,25,-20,-40oC
6.0
50 C
Maximum Output Voltage [Vrms]
o
85 C
5.0 Maximum Output Voltage [Vrms]
o
2.6
4.0
3.0
2.4
-40oC
-20oC
25oC
2.0
1.0
2.2 10 100 1000 Frequency [Hz]
Output Voltage vs Load Resistance
V+=9V, f=1kHz, VOL=0dB, I/O: INA1-1Aout ,T=85,50,25,-20,-40oC
0.0
10000 100000
0
5
10 Supply Voltage [+V]
15
20
Volum e Gain Output vs Volum e Setting
V+=9V, Vin=1Vrms f=1kHz, I/O: INA1-1Aout, T=85,50,25,-20,-40oC
4
8 7
Maximum Output Voltage [Vrms]
3
85oC
Volume Gain Output [dB]
100000
6 5 4 3 2 1 0
2
-40oC -20oC 25 C
o
1 100 1000 RL[] 10000
0
1
2
3 4 5 Volume Setting [dB]
6
7
8
-9-
NJW1110
! TYPICAL CHARACTERISTICS
Volum e Gain output vs Frequency
V+=9V, Vin=1Vrms,
THD+N vs Input Voltage
V+=9V, BW:10-22kHz(f=100Hz), 400-30kHz(f=1kHz, 10kHz), I/O: INA1-1Aout, T=85,50,25,-20,-40oC
10 9 8 Volume Gain Output [dB] 7 6 5 4 3 2 1 0 -1 10 100
I/O: INA1-1Aout, T=85,50,25,-20,-40oC
10
VOL= 8dB
1
VOL= 6dB
THD+N [%]
VOL= 3dB
0.1
f=100Hz
0.01
VOL= 0dB
0.001
f=1kHz
0.0001 0.01
f=10kHz
10
1000 10000 Frequency [Hz]
THD+N vs Input Voltage
100000
1000000
0.1 1 Input Voltage [Vrms]
THD+N vs Frequency
V+=9V, f=1kHz, BW:10-80kHz, Vin=1Vrms I/O: INA1-1Aout, T=85,50,25,-20,-40oC
V+=9V, f=1kHz, BW:400-30kHz, I/O: INA1-1Aout T=85,50,25,-20,-40
10
10
VOL= 8dB
1
VOL= 6dB VOL= 3dB VOL=0dB
THD+N [%] 10
1
THD+N [%]
0.1
0.1
0.01
0.01
0.001
0.001
0.0001 0.01
0.1 1 Input Voltage [Vrms] Cross Talk vs Frequency
V+=9V, Vin=1Vrms, VOL=0dB, BW:10-80kHz, I/O: INA13456789-1Aout,Select channel:INA2, T=25 C
o
0.0001 10 100 1000 Frequency [Hz] 10000 100000
Channel Separation vs Frequency
V+=9V, Vin=1Vrms, VOL=0dB, BW:10-80kHz,
-40
-40
I/O: INB1-1Aout, T=25oC
Rg=5.1k
-60 Cross Talk[dB]
Rg=5.1k
-60 Channel Separation[dB]
Rg=3.3k
Rg=3.3k Rg=620
-80
-80
Rg=620
Rg=0
-100
Rg=0
-100
-120 10 100 1000 Frequency [Hz] 10000 100000
-120 10 100 1000 Frequency [Hz] 10000 100000
- 10 -
NJW1110
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
- 11 -


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